Interrupts - Part II, Interrupt on RB Change

Copyright, Locksley Haynes & Peter H. Anderson, Dept of EE,
Morgan State University, Baltimore, MD 21239, Nov 22, '97

Introduction

This discussion deals with the interrupt on RB change feature. It assumes the reader is familiar with the general discussion dealing with interrupts.

The PIC16C84 and most other PICs provide a feature where the program may be configured such that an interrupt occurs when there is a change on any of a number of inputs. With the 16C84 (and 16C554/558), the interrupt is caused when there is a change on the upper nibble of Port B, i.e., RB.4::RB.7.

This might be used as a power saving technique. The processor is placed in the sleep mode and is activated only when the user changes the state of any on the four inputs. The processor then performs the defined task and goes back to sleep.

We are planning to use this feature in a 2000 event, 4 Channel event data logger. An event causes a change on any of the four inputs, waking the processor. The processor determines which of the four channels on which the event occurred. It will then fetch a 32-bit elapsed time in seconds from a Dallas DS1602. 32-bits accommodates an elapsed time of some 125 years, which is a bit much. Thus, only the lower 30 elapsed time bits will be used and the two bits associated with the channel will be inserted in the bit 31 and 30 positions. These four bytes will be saved to a Microchip 24LC65 (8K by 8) EEPROM.

Details

The general format of configuring for the Wake Up on Change interrupt is the same as with the external or timer / counter overflow interrupts. When ready for this interrupt, bit RBIE in the INTCON register is set which specifically indentifies the type of interrrupt that will be entertained. The GIE bit is then set.

On interrupt, the program vectors to location 004H. Note that interrupts are now disabled. The processor then performs the defined task, the RBIF is then cleared and the processor then returns from the interrupt service routine using the RETFIE command. Note that interrupts are now enabled.

There is a subtlety associated with the wake-up on change. PORTB must be read. The processor then stores a copy of the high nibble. The RBIF is then set and interrupt occurs when the high nibble of PORTB differs from this copy. Thus, it is important that in the interrupt service routine that PORTB be read so as to update the copy.

The following incorrect code in the interrupt service routine caused us to do a good deal of head scratching.

	BCF INTCON, RBIF
	MOVF PORTB, W

Indeed, we were clearing the interrupt flag. However, as the state of the high nibble of PORTB still differed from the old copy, the processor immediately set the RBIF flag and on RETFIE, we were immediately interrupted. In fact, the MOVF PORTB, F did us no good whatever.

The correct code was;

	MOVF PORTB, W
	BCF INTCON, RBIF
What a difference! In performing the MOVF PORTB, W, the old copy of the high nibble of PORTB is updated with the current state. The flag is then cleared. Thus, interrupt will occur when the high nibble of PORTB again changes.

In the following routine, the intent was to identify the "channel" on which the change occurred. Thus, in TOP, PORTB is fetched and saved in ORIGINAL.

In the interrupt service routine, PORTB is fetched and saved in NEW. Thus, the processor now has the new value as the basis for establishing if a future change occurs. The program then ascertains the specific bit which changed, and flashes an LED at a rate depending on which bit caused the interrupt. The NEW then becomes the ORIGINAL, the RBIF is cleared and when RETFIE is executed, control passes back to the main program with interrupts enabled. It is important to note that PORTB is read, thus updating the processor's copy prior to clearing RBIF.

Note that considerable time is spent flashing the LED in the interrupt service routine. If any of the four bits on the high nibble of PORTB should change prior to clearing RBIF, RBIF will again be set by the hardware as there is a change from the latest copy. Thus, on RETFIE, interupts are again enabled and another interrupt will occur. However, this is eactly what is desired; a bit on the high nibble of PORTB changed.

I am none too certain I have been any too clear. Always read PORTB so as to update the processor's reference prior to clearing RBIF. Failure to do so may cause a false interrupt as the processor compares the current state of the high nibble of PORTB with the most recent read. That is, the same change, which is in fact no change, will cause an interrupt.

Note that in this routine, the W and STATUS registers were not saved on entry into the interrupt service routine and restored prior to exit as there was nothing of value to save. Rather, the processor simply goes to sleep and awaits the interrupt.

; WAKE_UP.ASM
;
; This program is intended to illustrate the WAKE-UP on change feature
; associated with many PICs.
; 
; RB interrupts are enabled and the processor goes into a sleep mode.  
; On interrupt, the specific RB interrupt which caused the interrupt
; is determined and an LED is flashed 10 times at a speed determined 
; the input which changed.  
;
; Copyright, Locksley Haynes, Morgan State University, Nov 22, '97

	LIST p=16c84
	#include <c:\mplab\p16c84.inc>
        __CONFIG 11H

        CONSTANT LED=0  ; PORTA pin for LED

	CONSTANT CH3=7	; CH3 corresponds to PORTB.7
	CONSTANT CH2=6
	CONSTANT CH1=5
	CONSTANT CH0=4 	; CH0 corresponds to PORTB.4

	CONSTANT VARS=0CH

LOOP1 	EQU VARS+0    	; outter timing loop
LOOP2 	EQU VARS+1	; inner timing loop
LED_CNT EQU VARS+2	; times LED is winked


ORIGINAL EQU VARS+3
NEW	EQU VARS+4
CHANGE 	EQU VARS+5
N 	EQU VARS+6

	ORG  000H

	CLRWDT
	GOTO TOP

	ORG  004H

	GOTO WAKE_UP

TOP:
	BCF OPTION_REG, 7	; enable internal pullups
	BSF   STATUS, RP0
        MOVLW  0F0H		; RB.7 - RB.4 are inputs
        MOVWF  TRISB
        BCF   STATUS, RP1

	BTFSS STATUS, NOT_TO	; not a watch dog timer reset
 	GOTO TOP_1

        ; sample PORTB before going to sleep
        MOVF  PORTB, W		; fetch the current state
        MOVWF ORIGINAL		; current state in high nibble

TOP_1:
	BSF   INTCON, GIE      	; enable general interupts
        BSF   INTCON, RBIE     	; enable interrupt on change

L1:
        SLEEP
        NOP
        GOTO L1

WAKE_UP:    ; interrupt service routine
        MOVF  PORTB, W 		; sample changed state of pins
	MOVWF NEW		; this will become the new original
        XORWF ORIGINAL, W
	MOVWF CHANGE		; 1's now in high nibble now identifies
				; the bit that has changed
	CLRF N			; set index to 0
        BTFSC CHANGE, CH0
        GOTO BLINK

	INCF N, F		; N=1
        BTFSC CHANGE, CH1
        GOTO BLINK

	INCF N, F		; N=2
        BTFSC CHANGE, CH2
        GOTO BLINK
        
	INCF N, F
	GOTO BLINK

BLINK:	; N is either 0, 1, 2 or 3 corresponding to the channel
	; this is now mapped into a delay

	CALL DELAY_LOOKUP
	MOVWF LOOP1		; save the delay in LOOP1
	GOTO BLINK_AT_SPEED
	
DELAY_LOOKUP:	; map N into 100, 150, 200 or 250 msecs
	MOVF N, W
	ADDWF PCL, F
	DT .100, .150, .200, .250

BLINK_AT_SPEED:
        MOVLW .10
        MOVWF LED_CNT
L2:
        BSF   PORTA, LED
        CALL  DELAY
        CALL  DELAY
        BCF   PORTA, LED
        CALL  DELAY
        CALL  DELAY
        DECFSZ LED_CNT, F
        GOTO L2
	MOVF NEW, W
	MOVWF ORIGINAL   	; new original states		
        BCF   INTCON, RBIF  	; clear interrupt flag
        RETFIE

DELAY:     
L3:
     	MOVLW .110
	MOVLW LOOP2
L4:
   	CLRWDT
	NOP
	NOP
	NOP
	NOP
	NOP
	NOP
	DECFSZ LOOP2, F
	GOTO L4
	DECFSZ LOOP1, F
	GOTO L3
	RETURN

	END