// defs_1507.h
//
// Register definitions for the PIC16F1507 and similar
//
// copyright, Peter H Anderson, Baltimore, MD, Nov, '11

#define byte int

#define W 0
#define F 1

// register files
#byte INDF0     =0x00
#byte INDF1     =0x01
#byte PCL       =0x02
#byte STATUS    =0x03
#byte FSR0L     =0x04
#byte FSR0H     =0x05
#byte FSR1L     =0x06
#byte FSR1H     =0x07
#byte BSR       =0x08
#byte WREG      =0x09

#byte PCLATH    =0x0a
#byte INTCON    =0x0b


#byte PORTA     =0x0C
#byte PORTB 	=0x0D
#byte PORTC   	=0x0E

#byte PIR1   	=0x11
#byte PIR2   	=0x12
#byte PIR3 		=0x13

#byte TMR0   =0x15
#byte TMR1L   =0x16
#byte TMR1H   =0x17
#byte T1CON   =0x18
#byte T1GCON   =0x19
#byte TMR2   =0x1A
#byte PR2   =0x1B
#byte T2CON   =0x1C

#byte TRISA   =0x8C
#byte TRISB =0x8D
#byte TRISC   =0x8E

#byte PIE1   =0x91
#byte PIE2   =0x92
#byte PIE3  =0x93

#byte OPTION_REG =0x95
#byte PCON   =0x96
#byte WDTCON   =0x97

#byte OSCCON   =0x99
#byte OSCSTAT   =0x9A
#byte ADRESL   =0x9B
#byte ADRESH   =0x9C
#byte ADCON0   =0x9D
#byte ADCON1   =0x9E
#byte ADCON2   =0x9F

#byte LATA   =0x10C
#byte LATB  =0x10D
#byte LATC   =0x10E


#byte BORCON   =0x116
#byte FVRCON   =0x117

#byte APFCON   =0x11D

#byte ANSELA   =0x18C
#byte ANSELB    =0x18D
#byte ANSELC   =0x18E

#byte PMADRL   =0x191
#byte PMADRH   =0x192
#byte PMDATL   =0x193
#byte PMDATH   =0x194
#byte PMCON1   =0x195
#byte PMCON2   =0x196
#byte VREGCON   =0x197

#byte WPUA   =0x20C
#byte WPUB  =0x20D

#byte IOCAP   =0x391
#byte IOCAN   =0x392
#byte IOCAF   =0x393
#byte IOCBP   =0x394
#byte IOCBN   =0x395
#byte IOCBF   =0x396

#byte NCO1ACCL    =0x498
#byte NCO1ACCH   =0x499
#byte NCO1ACCU   =0x49A
#byte NCO1INCL   =0x49B
#byte NCO1INCH   =0x49C

#byte NCO1CON   =0x49E
#byte NCO1CLK   =0x49F

#byte PWM1DCL   =0x611
#byte PWM1DCH   =0x612
#byte PWM1CON   =0x613
#byte PWM2DCL   =0x614
#byte PWM2DCH   =0x615
#byte PWM2CON   =0x616
#byte PWM3DCL   =0x617
#byte PWM3DCH   =0x618
#byte PWM3CON   =0x619
#byte PWM4DCL   =0x61A
#byte PWM4DCH   =0x61B
#byte PWM4CON   =0x61C

#byte CWG1DBR   =0x691
#byte CWG1DBF   =0x692
#byte CWG1CON0   =0x693
#byte CWG1CON1   =0x694
#byte CWG1CON2   =0x695

#byte CLCDATA   =0xF0F
#byte CLC1CON   =0xF10
#byte CLC1POL   =0xF11
#byte CLC1SEL0   =0xF12
#byte CLC1SEL1   =0xF13
#byte CLC1GLS0   =0xF14
#byte CLC1GLS1   =0xF15
#byte CLC1GLS2   =0xF16
#byte CLC1GLS3   =0xF17

#byte CLC2CON   =0xF18
#byte CLC2POL   =0xF19
#byte CLC2SEL0   =0xF1A
#byte CLC2SEL1   =0xF1B
#byte CLC2GLS0   =0xF1C
#byte CLC2GLS1   =0xF1D
#byte CLC2GLS2   =0xF1E
#byte CLC2GLS3   =0xF1F


#byte STATUS_SHAD   =0xFE4
#byte WREG_SHAD      =0xFE5
#byte BSR_SHAD      =0xFE6
#byte PCLATH_SHAD   =0xFE7
#byte FSR0L_SHAD   =0xFE8
#byte FSR0H_SHAD   =0xFE9
#byte FSR1L_SHAD   =0xFEA
#byte FSR1H_SHAD   =0xFEB

#byte STKPTR   =0xFED
#byte TOSL   =0xFEE
#byte TOSH   =0xFEF

// Bank 0

#bit gie   =INTCON.7
#bit peie   =INTCON.6
#bit tmr0ie   =INTCON.5
#bit inte   =INTCON.4
#bit iocie   =INTCON.3
#bit tmr0if   =INTCON.2
#bit intf   =INTCON.1
#bit iocif   =INTCON.0

#bit ra5      =PORTA.5
#bit ra4      =PORTA.4
#bit ra3      =PORTA.3
#bit ra2      =PORTA.2
#bit ra1      =PORTA.1
#bit ra0      =PORTA.0

#bit rb7      =PORTB.7
#bit rb6      =PORTB.6
#bit rb5      =PORTB.5
#bit rb4      =PORTB.5

#bit rc7   =PORTC.7
#bit rc6   =PORTC.6
#bit rc5      =PORTC.5
#bit rc4      =PORTC.4
#bit rc3      =PORTC.3
#bit rc2      =PORTC.2
#bit rc1      =PORTC.1
#bit rc0      =PORTC.0

#bit tmr1gif    =PIR1.7
#bit adif   =PIR1.6
#bit tmr2if   =PIR1.1
#bit tmr1if   =PIR1.0

#bit nco1if   =PIR2.2

#bit clc2if   =PIR3.1
#bit clc1if   =PIR3.2

#bit tmr1on   =T1CON.0
#bit t1sync_    =T1CON.2
#bit t1ckps0     =T1CON.4
#bit t1ckps1     =T1CON.5
#bit tmr1cs0     =T1CON.6
#bit tmr1cs1     =T1CON.7

#bit t1gss     =T1GCON.0
#bit t1gval   =T1GCON.2
#bit t1ggo   =T1GCON.3
#bit t1gspm   =T1GCON.4
#bit t1gtm   =T1GCON.5
#bit t1gpol   =T1GCON.6
#bit tmr1ge   =T1GCON.7

#bit t2outps3    =T2CON.6
#bit t2outps2   =T2CON.5
#bit t2outps1   =T2CON.4
#bit t2outps0   =T2CON.3

#bit tmr2on      =T2CON.2
#bit t2ckps1   =T2CON.1
#bit t2ckps0   =T2CON.0

// Bank 1

#bit trisa5      =TRISA.5
#bit trisa4      =TRISA.4
#bit trisa3      =TRISA.3
#bit trisa2      =TRISA.2
#bit trisa1      =TRISA.1
#bit trisa0      =TRISA.0

#bit trisb7      =TRISB.7
#bit trisb6      =TRISB.6
#bit trisb5      =TRISB.5
#bit trisb4      =TRISB.4

#bit trisc7      =TRISC.7
#bit trisc6      =TRISC.6
#bit trisc5      =TRISC.5
#bit trisc4      =TRISC.4
#bit trisc3      =TRISC.3
#bit trisc2      =TRISC.2
#bit trisc1      =TRISC.1
#bit trisc0      =TRISC.0

#bit tmr1ie   =PIE1.0
#bit tmr2ie   =PIE1.1

#bit adie   =PIE1.6
#bit tmr1gie   =PIE1.7

#bit nco1ie =PIE2.2

#bit clc2ie =PIE3.1
#bit clc1ie =PIE3.0

#bit ps0   =OPTION_REG.0
#bit ps1   =OPTION_REG.1
#bit ps2   =OPTION_REG.2
#bit psa   =OPTION_REG.3
#bit tmr0se   =OPTION_REG.4
#bit tmr0cs   =OPTION_REG.5
#bit intedg   =OPTION_REG.6
#bit wpuen_   =OPTION_REG.7

#bit bor_   =PCON.0
#bit por_   =PCON.1
#bit ri_   =PCON.2
#bit rmclr_   =PCON.3
#bit rwdt_  =PCON.4
#bit stkunf   =PCON.6
#bit stkovf   =PCON.7

#bit swdten   =WDTCON.0

#bit scs0   =OSCCON.0
#bit scs1   =OSCCON.1

#bit ircf0   =OSCCON.3
#bit ircf1   =OSCCON.4
#bit ircf2   =OSCCON.5
#bit ircf3   =OSCCON.6

#bit adon   =ADCON0.0
#bit adgo   =ADCON0.1
#bit chs0   =ADCON0.2
#bit chs1   =ADCON0.3
#bit chs2   =ADCON0.4
#bit chs3   =ADCON0.5
#bit chs4   =ADCON0.6

#bit adpref0   =ADCON1.0
#bit adpref1   =ADCON1.1
#bit adcs0   =ADCON1.4
#bit adcs1   =ADCON1.5
#bit adcs2   =ADCON1.6
#bit adfm   =ADCON1.7

#bit trigsel0   =ADCON1.4
#bit trigsel1   =ADCON1.5
#bit trigsel2   =ADCON1.6
#bit trigsel3   =ADCON1.7

// Bank 2

#bit lata5      =LATA.5
#bit lata4      =LATA.4
#bit lata3      =LATA.3
#bit lata2      =LATA.2
#bit lata1      =LATA.1
#bit lata0      =LATA.0

#bit latb7      =LATB.7
#bit latb6      =LATB.6
#bit latb5      =LATB.5
#bit latb4      =LATB.4

#bit latc7      =LATC.7
#bit latc6      =LATC.6
#bit latc5      =LATC.5
#bit latc4      =LATC.4
#bit latc3      =LATC.3
#bit latc2      =LATC.2
#bit latc1      =LATC.1
#bit latc0     =LATC.0

#bit borrdy   =BORCON.0
#bit borfs  =BORCON.6
#bit sboren   =BORCON.7

#bit adfvr0   =FVRCON.0
#bit adfvr1   =FVRCON.1

#bit tsrng   =FVRCON.4
#bit tsen   =FVRCON.5

#bit fvrrdy   =FVRCON.6
#bit fvren   =FVRCON.7

#bit nco1sel =APFCON.0
#bit clc1sel =APFCON.1

// Bank 3

#bit ansa4     =ANSELA.4
#bit ansa2     =ANSELA.2
#bit ansa1     =ANSELA.1
#bit ansa0     =ANSELA.0

#bit ansb5     =ANSELB.5
#bit ansb4     =ANSELB.4

#bit ansc7       =ANSELC.7
#bit ansc6     =ANSELC.6
#bit ansc3       =ANSELC.3
#bit ansc2     =ANSELC.2
#bit ansc1     =ANSELC.1
#bit ansc0     =ANSELC.0

#bit rd      =PMCON1.0
#bit wr      =PMCON1.1
#bit wren   =PMCON1.2
#bit wrerr   =PMCON1.3
#bit free   =PMCON1.4
#bit lwlo   =PMCON1.5
#bit cfgs   =PMCON1.6

#bit vregpm = VREGCON.1

// Bank 4

#bit wpua5       =WPUA.5
#bit wpua4       =WPUA.4
#bit wpua3       =WPUA.3
#bit wpua2       =WPUA.2
#bit wpua1       =WPUA.1
#bit wpua0       =WPUA.0

#bit wpub7       =WPUB.7
#bit wpub6       =WPUB.6
#bit wpub5       =WPUB.5
#bit wpub4       =WPUB.4

#bit iocap0    =IOCAP.0
#bit iocap1    =IOCAP.1
#bit iocap2    =IOCAP.2
#bit iocap3    =IOCAP.3
#bit iocap4    =IOCAP.4
#bit iocap5    =IOCAP.5

#bit iocan0    =IOCAN.0
#bit iocan1    =IOCAN.1
#bit iocan2    =IOCAN.2
#bit iocan3    =IOCAN.3
#bit iocan4    =IOCAN.4
#bit iocan5    =IOCAN.5

#bit iocaf0    =IOCAF.0
#bit iocaf1    =IOCAF.1
#bit iocaf2    =IOCAF.2
#bit iocaf3    =IOCAF.3
#bit iocaf4    =IOCAF.4
#bit iocaf5    =IOCAF.5

#bit iocbp4    =IOCBP.4
#bit iocbp5    =IOCBP.5
#bit iocbp6    =IOCBP.6
#bit iocbp7    =IOCBP.7

#bit iocbn4    =IOCBN.4
#bit iocbn5    =IOCBN.5
#bit iocbn6    =IOCBN.6
#bit iocbn7    =IOCBN.7

#bit iocbf4    =IOCBF.4
#bit iocbf5    =IOCBF.5
#bit iocbf6    =IOCBF.6
#bit iocbf7    =IOCBF.7

// Bank 9
// Did not do NCO1ACCL, etc

#bit n1en     =NCO1CON.7
#bit n1oe     =NCO1CON.6
#bit n1out    =NCO1CON.5
#bit n1pol    =NCO1CON.4

#bit n1pfm    =NCO1CON.0

#bit n1pws2   =NCO1CLK.7
#bit n1pws1   =NCO1CLK.7
#bit n1pws0   =NCO1CLK.7

#bit n1cks1   =NCO1CLK.7
#bit n1cks0   =NCO1CLK.7


// Bank 12

#bit pwm1dcl7  =PWM1DCL.7
#bit pwm1dcl6  =PWM1DCL.6

#bit pwm1dch7  =PWM1DCH.7
#bit pwm1dch6  =PWM1DCH.6
#bit pwm1dch5  =PWM1DCH.5
#bit pwm1dch4  =PWM1DCH.4
#bit pwm1dch3  =PWM1DCH.3
#bit pwm1dch2  =PWM1DCH.2
#bit pwm1dch1  =PWM1DCH.1
#bit pwm1dch0  =PWM1DCH.0

#bit pwm1en    =PWM1CON.7
#bit pwm1oe    =PWM1CON.6
#bit pwm1out   =PWM1CON.5
#bit pwm1pol   =PWM1CON.4

#bit pwm2dcl7  =PWM2DCL.7
#bit pwm2dcl6  =PWM2DCL.6

#bit pwm2dch7  =PWM2DCH.7
#bit pwm2dch6  =PWM2DCH.6
#bit pwm2dch5  =PWM2DCH.5
#bit pwm2dch4  =PWM2DCH.4
#bit pwm2dch3  =PWM2DCH.3
#bit pwm2dch2  =PWM2DCH.2
#bit pwm2dch1  =PWM2DCH.1
#bit pwm2dch0  =PWM2DCH.0

#bit pwm2en    =PWM2CON.7
#bit pwm2oe    =PWM2CON.6
#bit pwm2out   =PWM2CON.5
#bit pwm2pol   =PWM2CON.4

#bit pwm3dcl7  =PWM3DCL.7
#bit pwm3dcl6  =PWM3DCL.6

#bit pwm3dch7  =PWM3DCH.7
#bit pwm3dch6  =PWM3DCH.6
#bit pwm3dch5  =PWM3DCH.5
#bit pwm3dch4  =PWM3DCH.4
#bit pwm3dch3  =PWM3DCH.3
#bit pwm3dch2  =PWM3DCH.2
#bit pwm3dch1  =PWM3DCH.1
#bit pwm3dch0  =PWM3DCH.0

#bit pwm3en    =PWM3CON.7
#bit pwm3oe    =PWM3CON.6
#bit pwm3out   =PWM3CON.5
#bit pwm3pol   =PWM3CON.4

#bit pwm4dcl7  =PWM4DCL.7
#bit pwm4dcl6  =PWM4DCL.6

#bit pwm4dch7  =PWM4DCH.7
#bit pwm4dch6  =PWM4DCH.6
#bit pwm4dch5  =PWM4DCH.5
#bit pwm4dch4  =PWM4DCH.4
#bit pwm4dch3  =PWM4DCH.3
#bit pwm4dch2  =PWM4DCH.2
#bit pwm4dch1  =PWM4DCH.1
#bit pwm4dch0  =PWM4DCH.0

#bit pwm4en    =PWM4CON.7
#bit pwm4oe    =PWM4CON.6
#bit pwm4out   =PWM4CON.5
#bit pwm4pol   =PWM4CON.4

// Bank 13


#bit c_shad   =STATUS_SHAD.0
#bit dc_shad   =STATUS_SHAD.1
#bit z_shad   =STATUS_SHAD.2