**********
* Program TIME_1 (6811)
*
* Illustrates use of a single memory location to perform
* simple loop timing.
*
* Note use of pseudo opcode OPT to enable the cycle counter.
* 
* Note that each instruction cycle is 0.5 usecs.
*
* Calculation of cycles:
*
* 	2 + 101 (2+3) + 2 + 5 + 3 = 517 ~ or 258.5 usecs
*	half period = 258.5 usecs; period = 517 usecs
*	frequency = 1/517 usecs = 1923.2 pps
*
* P. H. Anderson, MSU, 14 Jan, '93
**********

PSCT		EQU  $C000
DSCT		EQU  $D000
IDSCT		EQU  $D300

REG_BASE	EQU  $1000	* Note use of indexed addressing

PORTB	EQU  $04
PORTC	EQU  $03
DDRC	EQU  $07

	ORG PSCT

	OPT c		* listing to have cycles

	LDY #REG_BASE
	CLR DDRC,Y	* port c configured as 8-bit input

	LDAA #$01	* pattern initialized

TOP
	LDAB #101	* counter set to 101
AGN
	DECB
	BNE AGN
	EORA #01	
	STAA PORTB,Y	* output to LEDs
	BRA TOP